
Samsung has announced that it has commenced mass production of its fourth-generation High Bandwidth Memory (HBM4) and has begun shipping commercial products to customers. The move signals an aggressive push by the South Korean tech giant to secure an early foothold in the next-generation memory market, which is critical for supporting scaling AI models.
Utilizing its 6th-generation 10 nanometer (nm)-class DRAM process (known as 1c), Samsung reports that it achieved stable yields immediately upon entering mass production without requiring additional redesigns.
Performance Benchmarks
According to specifications released by the company, the new HBM4 modules offer significant performance upgrades over the previous generation, HBM3E. Samsung states that the new memory delivers a consistent processing speed of 11.7 gigabits-per-second (Gbps),
This speed exceeds the current industry standard of 8Gbps by approximately 9.6Gbps and represents a 1.22x increase over the maximum pin speed of HBM3E. The company noted that performance could potentially be enhanced up to 13Gbps to mitigate data bottlenecks associated with large-scale AI processing.
In terms of bandwidth, the total memory bandwidth per single stack has increased by 2.7x compared to HBM3E, reaching a maximum of 3.3 terabytes-per-second (TB/s).
Capacity and Efficiency Updates
Samsung is currently offering HBM4 in capacities ranging from 24GB to 36GB via 12-layer stacking technology. To align with future customer requirements, the company plans to introduce 16-layer stacking, which will expand capacity offerings up to 48GB.
Addressing the physical challenges of doubling data I/Os from 1,024 to 2,048 pins, Samsung has integrated specific power and thermal management solutions:
- Power Efficiency: By leveraging low-voltage Through Silicon Via (TSV) technology and optimizing the Power Distribution Network (PDN), power efficiency has improved by 40% compared to HBM3E.
- Thermal Management: The company reports a 10% enhancement in thermal resistance and a 30% improvement in heat dissipation.
Production and Future Roadmap
Samsung is leveraging a Design Technology Co-Optimization (DTCO) strategy, which integrates operations between its Foundry and Memory businesses, to manage quality and yield. The company is also utilizing in-house advanced packaging facilities to streamline production cycles.
Looking forward, Samsung projects that its HBM sales will more than triple in 2026 compared to 2025 figures. The company has outlined the following timeline for future iterations:
- HBM4E: Sampling is expected to begin in the second half of 2026.
- Custom HBM: Samples tailored to specific customer specifications are scheduled for release in 2027.
The company indicated it plans to broaden technical partnerships with global GPU manufacturers and hyperscalers, specifically focusing on next-generation ASIC development.
Regarding this, Sang Joon Hwang, Executive Vice President and Head of Memory Development at Samsung Electronics, said:
Instead of taking the conventional path of utilizing existing proven designs, Samsung took the leap and adopted the most advanced nodes like the 1c DRAM and 4nm logic process for HBM4. By leveraging our process competitiveness and design optimization, we are able to secure substantial performance headroom, enabling us to satisfy our customers’ escalating demands for higher performance, when they need them.
