At the Future of Memory and Storage (FMS) 2026 conference in Santa Clara, California, Sandisk Corporation and SK hynix Inc. announced the release of the first standard specifications for High Bandwidth Flash (HBF).
Published through the Open Compute Project (OCP), the specification aims to establish HBF as an open standard to address memory bandwidth and capacity constraints in artificial intelligence (AI) inference workloads.
The release comes six months after the formation of the HBF technology workstream under OCP in February 2026, following an initial standardization partnership between Sandisk and SK hynix in August 2025. During the standardization process, major industry entities—including Google and Tenstorrent—joined the consortium, participating in technology validation and standard formulation.
Key Technical Specifications
HBF technology introduces a memory layer positioned between High Bandwidth Memory (HBM) and Solid State Drives (SSDs). Designed to sit close to compute cores, it combines high-speed data transfer with high-density NAND capacity to reduce total cost of ownership (TCO) and support large language models (LLMs) and emerging AI workloads.
- Capacity: Up to 512 GB, based on 8-high and 16-high NAND die stack configurations.
- Bandwidth: Categorized into three grades (Grade 1 to Grade 3), providing scalable throughput ranging from 0.4 TB/s to 3.0 TB/s.
- Host Interconnect: Adopts Universal Chiplet Interconnect Express (UCIe) to enable integration across various processor types, including GPUs, CPUs, and specialized xPUs.
- Technical Guidelines: Defines connection interfaces, electrical characteristics, reliability and packaging standards for HBF die stacks, alongside software user guides for read/write I/O operations.
By publishing the specifications openly through OCP, Sandisk and SK hynix aim to build an early-stage ecosystem, improve interoperability, and enable HBF to coexist alongside existing HBM architecture.
FMS 2026 Presentations and Panel Sessions
Both companies are highlighting HBF and tiered memory architectures through technical presentations and panels at FMS 2026:
Keynote Sessions
- SK hynix Keynote (August 4): Executive Vice President Kim Chun-sung and Vice President Kang Uk-song presented “Orchestrating Efficient AI Infrastructure through Tiered Memory in the Era of Agentic AI,” focusing on multi-tier memory frameworks for scaling AI data demand.
- Sandisk Keynote (August 5, 11:40 a.m. PT): Chief Revenue Officer Jim Elliott, Chief Product Officer Khurram Ismail, and Chief Technology Officer Alper Ilkbahar will present “NAND – The Versatile & Scalable Foundation of the AI Era,” detailing system-level optimizations for AI inference.
Joint Panel Discussion (August 6, 9:45 a.m. PT)
A panel titled “Breaking the Memory Wall with High Bandwidth Flash”—moderated by Thomas Coughlin (President, Coughlin Associates)—will feature:
- Rajeev Nagabhirava, Vice President, Sandisk
- Lim Eui-cheol, Vice President, SK hynix
- Xiaoyu Ma, Senior Staff Engineer, Google DeepMind
The session will focus on architectural integration, performance economics, technical challenges, and standardization timelines for HBF.
SK hynix Exhibits 375-Layer V10 4D NAND
Alongside the HBF announcement, SK hynix revealed its tenth-generation (V10) 375-layer 4D NAND wafer and product prototypes for the first time.
According to the company, the 375-layer 4D NAND achieves a 2.5x improvement in performance-per-watt compared to its previous generation, targeting power-sensitive data center environments. SK hynix plans to begin mass production of enterprise SSDs (eSSDs) based on the 375-layer process early next year, while displaying additional memory solutions across mobile, automotive, PC, and robotics applications at its exhibition booth.