Samsung Electronics and Broadcom have officially entered into a memorandum of understanding (MOU) to expand their strategic collaboration across memory, foundry, and advanced packaging technologies. Estimated at more than $200 billion through 2030, the partnership aims to support the expanding demands of next-generation artificial intelligence (AI) infrastructure.
The formal announcement took place at the AI Summit, hosted at The Midway in San Francisco. Key attendees included Jinman Han, President and Head of Samsung Electronics’ Foundry Business, and Hock Tan, President and CEO of Broadcom, alongside senior executives from both companies and representatives of the South Korean government.
Key Highlights of the Agreement
- Estimated Value: Broadcom and Samsung project the total value of the collaboration to exceed $200 billion over the next five years (through 2030).
- Memory Supply: Strategic partnership for high-bandwidth memory (HBM) integrated into Broadcom’s next-generation AI accelerators.
- Foundry Node Technologies: Focus on Samsung’s 2-nanometer (nm) and sub-2nm process nodes for Broadcom products, including Wireless Broadband Communications (WBC) solutions.
- Advanced Packaging: Joint implementation of 2.3D and 2.5D integration based on the 2nm process node to maximize performance and power efficiency in AI and networking silicon.
Expanding Memory and Foundry Synergies
Under the terms of the agreement, the two companies plan to pursue strategic alignment in both memory supply and leading-edge semiconductor manufacturing.
On the memory front, Samsung will provide industry-leading memory solutions—including specialized High Bandwidth Memory (HBM)—designed to meet the stringent performance requirements of Broadcom’s AI accelerators.
Concurrently, the foundry initiative targets advanced manufacturing processes. Samsung will utilize its sub-2nm process technologies to manufacture Broadcom’s silicon, including its high-speed Wireless Broadband Communications (WBC) portfolio. The initiative will also leverage advanced packaging frameworks—specifically 2.3D and 2.5D integration architectures built on the 2nm process node—to enable high-density, energy-efficient interconnects between logic and memory components.
Integrated Semiconductor Strategy for the AI Era
| Technology Domain | Focus Areas | Primary Objective |
| Memory | Next-generation High Bandwidth Memory (HBM) | Support high-throughput data demands for custom AI accelerators. |
| Foundry | 2nm and sub-2nm process nodes | Manufacture high-performance logic and Wireless Broadband Communications (WBC) products. |
| Packaging | 2.3D and 2.5D heterogeneous integration | Enhance bandwidth and lower power consumption for AI/networking hardware. |
The joint initiative highlights Samsung’s position as an end-to-end provider spanning memory, logic, foundry, and heterogeneous packaging capabilities. The expanded collaboration underscores both companies’ focus on addressing the growing technical complexity of high-performance computing (HPC) and AI workloads across global data center ecosystems.